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CForth Low Power for STM32G431, STM32G43 and STM32F042

The intention for this project is to get a tool for control dynamic art installations powered by small solar panels or other "weak" power sources using the Forth programming language (no relationship to "Mitch Bradley's CForth").
For this reason, reduced versions of the CForth interpreter for STM32G431KB, STM32G441KB and STM32F042 (latter works with STM32F070, too) and corresponding Verobard compatible PCB designs are developed.

LowPower Hardware:

First of all the CPU clock speed (STM32 AHB and APB bus) is reduced to 921.6kHz (optionally switchable to 3.6864MHz or 14.7456MHz at runtime), derived from a 3.6864MHz or 14.7456MHz crystal.
USB cannot be operated with this clock frequency. But this is not regarded as harmful because USB uses a considerable amout of current and Flash memory (latter case is important for the STM32F042 version, there was a struggle byte by byte to fit the code into Flash). The chosen system frequency allows standard RS-232 Baud Rates up to 115200. The RS-232 interface does not draw current except during data transfer. The RS-232 transmitter is extremely simplified, but has been tested with several standard RS-232 receivers.

Another critical aspect of supply current is the quality of the 3.3V regulator. I still had some original STM LE33A devices, which are a quite good choice, average ground pin current measured ca. 0.5mA with CPU running at normal speed and without additional external components. A good - or even better - alternative is LP2950ACZ-3.3. It is pin compatible and uses only around 0.2mA ground pin current, but increasing with higher load.
The LED should be a very efficient blue or white type. To save current, a special CForth kernel operator "LED" is introduced to switch the LED off when not needed. With 10kOhm serial resistor, a blue LED uses about 0.1mA.

Below the line: the complete STM32G431 prototype uses ca. 2.2mA with LED OFF, the STM23F042 prototype uses ca. 1.6mA with LED OFF. Processors are always in full speed mode. No Sleep or Idle mode is used. Though the STM32G431 surely is the more interesting processor, for the intended range of use the more compact and less current hungry STM32F042 seems to be more atttractive. But project memory is rare there.

both models Veroboard PCBs
Veroboard assembly prototypes.
left:STM32G431KBright:STM32F042F6
each soldered on 15.24mm DIL breakout board.
Another Veroboard layout for STM32F042K6 (LQFP32) is provided.

About CForth LowPower Firmware:

The set of Kernel Operators and their features is almost the same as the standard CForth version, with lower execution speed of course.
Differing from the STM32G431 version, the thread code for STM32F042 processors is compacted to 8bit format, which increases the maximum user Forth code up to 3 times compared with first versions, which used 32bit thread code format.
The code for STM32F042 is 1:1 useable with STM32F070. The code for STM32G431 is 1:1 useable with STM32G441,LQFP32

The most essential differences against standard CForth:

A detailled CForth Operating Manual Standard version (PDF file), and
a DIY Construction Manual Low Power version (PDF file) is provided here.
For the STM32F042K6 32 pin LQFP version, see cforth/cforth-hwdiyman.pdf pages 6,7

A good tool for Forth source code upload is my DTerm Windows terminal software. It is surely not the best terminal emulator, but has been developed over the years for best fitness with my actual projects.

Downloads:
The subsequently downloadable material is copyrighted (c)2020-22 by Wolfgang Schemmert.
Assembly of the devices, programming and use of the software is permitted for free by everybody for any purpose ("freeware"). For commercial use, restrictions of third-party software contributors (Segger GmbH, STM) must be respected.
All information is based on best knowledge, but "as is" and without any warranty. Any responsibility is excluded. Use for dangerous, life-threatening and medical applications is forbidden.

PCB layout for the "STM32G431, STM32G441 Low Power board" PCB
(1:1 TIF format. BOTTOM layer as well as component placement view are "from component side", i.e. BOTTOM layer shown mirrored "through the PCB" (as needed for PCB production))

PCB layout for the "STM32F042 20pin TSSOP Low Power board" PCB
(1:1 TIF format. BOTTOM layer as well as component placement view are "from component side", i.e. BOTTOM layer shown mirrored "through the PCB" (as needed for PCB production))

PCB layout for the "STM32F042 32pin LQFP Low Power board" PCB
(1:1 TIF format. BOTTOM layer as well as component placement view are "from component side", i.e. BOTTOM layer shown mirrored "through the PCB" (as needed for PCB production). Details see cforth/cforth-hwdiyman.pdf pages 6,7

Firmware "CForth-LP-G4xx-3M68.hex" for Veroboard compatible PCB, CPU Clock = 921.6kHz/3.6864MHz switchable.
(21 December 2021 - New features:MOT, PWM3. Else minor bugfix, minor code improvements))

Firmware "CForth-LP-G4xx-14.hex" for Veroboard compatible PCB, CPU Clock = 921.6kHz/3.6864MHz/14.7456 switchable. Uses 14.7456MHz crystal!
(17 June 2022 - bugfixes and improvements)

Source code "CForth-LP-G4xx-v6.zip"
(state 17 June 2022. This source code is provided as complete "Segger Embedded Studio" project (ZIP file, 492 kB).
Parts published by Segger GmbH are under license of Segger&|Rowley, parts published by STM are under license of STM, parts programmed by me are provided under GNU GPL3 license.

Firmware "CForth-LP-F042-3m68motor.hex" for 20pin TSSOP Veroboard compatible PCB. CPU Clock = 921.6kHz/3.6864MHz switchable. Code for stepper motor
(17 June 2022 - first release)

Firmware "CForth-LP-F042lqfp-3m68motor.hex" for 32pin LQFP Veroboard compatible PCB. CPU Clock = 921.6kHz/3.6864MHz switchable. Code for stepper motor
(17 June 2022 - first release)

Firmware "CForth-LP-F042-3m68pwm2.hex" for 20pin TSSOP Veroboard compatible PCB. CPU Clock = 921.6kHz/3.6864MHz switchable. Code for PWM2
(17 June 2022 - first release)

Firmware "CForth-LP-F042lqfp-3m68pwm2.hex" for 32pin LQFP Veroboard compatible PCB. CPU Clock = 921.6kHz/3.6864MHz switchable. Code for PWM2
(17 June 2022 - first release)

Firmware "CForth-LP-F042-14motor.hex" for 20pin TSSOP Veroboard compatible PCB. CPU Clock = 921.6kHz/3.6864MHz/14.7456 switchable. Uses 14.7456MHz crystal!
(17 June 2022 - bugfixes and improvements)

Firmware "CForth-LP-F042lqfp-14motor.hex" for 32pin LQFP Veroboard compatible PCB. CPU Clock = 921.6kHz/3.6864MHz/14.7456 switchable. Uses 14.7456MHz crystal!
(17 June 2022 - bugfixes and improvements)

Firmware "CForth-LP-F042-14pwm2.hex" for 20pin TSSOP Veroboard compatible PCB. CPU Clock =CPU Clock = 921.6kHz/3.6864MHz/14.7456 switchable. Uses 14.7456MHz crystal!
(17 June 2022 - bugfixes and improvements)

Firmware "CForth-LP-F042lqfp-14pwm2.hex" for 32pin LQFP Veroboard compatible PCB. CPU Clock =CPU Clock = 921.6kHz/3.6864MHz/14.7456 switchable. Uses 14.7456MHz crystal!
(17 June 2022 - bugfixes and improvements)

Firmware "CForth-LP-F042-48motor.hex" for 20pin TSSOP Veroboard compatible PCB. Designed for the same hardware as described here and the same firmware features but equiped with an 8.0MHz crystal and uses the processor built-in PLL to work with 48MHz AHB and APB frequency. Speed of I/O features is the same as CForth standard version. Provides more Flash and some more I/O features than the standard version.
(17 June 2022 - bugfixes and improvements)

Firmware "CForth-LP-F042lqfp-48motor.hex" for 32pin LQFP Veroboard compatible PCB, else general description as above
(17 June 2022 - bugfixes and improvements)

Firmware "CForth-LP-F042-48pwm2.hex" General description as above
(17 June 2022 - bugfixes and improvements)

Firmware "CForth-LP-F042lqfp-48pwm2.hex" General description as above
(17 June 2022 - bugfixes and improvements)

Source code "CForth-LP-F042-v7.zip"
(state 17 June 2022). This source code is provided as complete "Segger Embedded Studio" project (ZIP file, 610kB).
Parts published by Segger GmbH are under license of Segger&|Rowley, parts published by STM are under license of STM, parts programmed by me are provided under GNU GPL3 license.

These projects are programmed directly on register level, no external libraries (except "cmsis", startup code and Segger system code), no external drivers or HAL are used.


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* State of information June 2022.
* Right of technical modifications reserved. Provided 'as is' - without any warranty. Any responsibility is excluded.
* This description is for information only. No product specifications are assured in juridical sense.
* Trademarks and product names cited in this text are property of their respective owners.